3D-DRAM Technology Increases Memory Density over Conventional DRAMs
Startup Announces Monolithic 3D DRAM Technology - MonolithIC 3D Inc., one of the industry’s leading innovators in 3D-IC technology, has unveiled a monolithic 3D DRAM technology. The startup claims this technology can provide a 2x-3x increase in memory density over conventional DRAMs at comparable costs.
Zvi Or-Bach, President and CEO of MonolithIC 3D, said, “The DRAM industry faces several difficult challenges today with scaling and, in particular, with lithography. Companies using our monolithic 3D DRAM technology can reduce their lithography risk and get a much better return-on-investment for their fab equipment.”
The Monolithic 3D DRAM technology was announced with an invited presentation at the American Vacuum Society 3D Workshop in San Jose. Dr. Deepak Sekar, Chief Scientist of MonolithIC 3D Inc. and presenter at the workshop said, “We use a 3D stacked architecture and share lithography steps among multiple memory layers. The NAND flash memory industry has been pursuing 3D technology with shared lithography steps with polysilicon transistors for some time now. At MonolithIC 3D Inc., we use single crystal silicon transistors, and that allowed us to apply these concepts to DRAM.”
The technology leverages a technique known as ion-cut to stack high-quality single crystal silicon layers at low thermal budgets. Ion-cut is the dominant technology used for producing silicon-on-insulator (SOI) wafers for logic technologies today and has been in manufacturing for more than 10 years. Several companies such as Silicon Genesis and Twin Creeks Technologies are exploring its use for solar as well.
Zvi Or-Bach, President and CEO of MonolithIC 3D, said, “The DRAM industry faces several difficult challenges today with scaling and, in particular, with lithography. Companies using our monolithic 3D DRAM technology can reduce their lithography risk and get a much better return-on-investment for their fab equipment.”
The Monolithic 3D DRAM technology was announced with an invited presentation at the American Vacuum Society 3D Workshop in San Jose. Dr. Deepak Sekar, Chief Scientist of MonolithIC 3D Inc. and presenter at the workshop said, “We use a 3D stacked architecture and share lithography steps among multiple memory layers. The NAND flash memory industry has been pursuing 3D technology with shared lithography steps with polysilicon transistors for some time now. At MonolithIC 3D Inc., we use single crystal silicon transistors, and that allowed us to apply these concepts to DRAM.”
The technology leverages a technique known as ion-cut to stack high-quality single crystal silicon layers at low thermal budgets. Ion-cut is the dominant technology used for producing silicon-on-insulator (SOI) wafers for logic technologies today and has been in manufacturing for more than 10 years. Several companies such as Silicon Genesis and Twin Creeks Technologies are exploring its use for solar as well.
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